Posts Tagged “DDR2”

Nov 23 2008

Xilinx MIG DDR2 266Mhz

Posted by: ben in FPGA, tags: , ,

Today I want to use the attached DDR2 Ram on the ml50x (XUPV5) board. Xilinx provides a Memory Interface Generation (MIG) IP core which could be used to generate a design which drives all ddr2 lines and provides an interface for user logic. It is extremely sadly that xilinx doesn’t provide directly the needed ucf-files Continue reading →

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