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Mozilla provides a very nice add-on called “Firefox Sync” (included in FF4). It synchronise bookmarks, history, passwords, etc to a server, of course data will be stored encrypted. There is a nice blog post which provides a link to a tiny weave minimal server implementation. After installation you just can point the sync add-on to Continue reading →

When the XUPV5 board arrived (in 2008) it already was configured to boot OpenSolaris on the OpenSPARC T1 processor. I just did a short boot and looked at the serial prompt. This was the whole experience I made with the default set-up. Since the board was needed for other projects, I deleted the files from Continue reading →

Again the issue with the Xilinx JTAG cable under Linux. This post is just a reminder… After putting the cable into the USB port, nothing happens. ‘lsusb’ shows the device but the led on the JTAG box doesn’t light up, which means the firmware isn’t loaded. The firmware is provided by Xilinx and it can Continue reading →

New week, new API. I’m not the person who complains about APIs, but the RDMA API is somehow scary. For a simple “HelloWorld” data transfer program I had to write over 600 lines of code. Just think about that, if everybody has to code 600 lines to get a connection and a remote buffer to Continue reading →

I started looking into the graphic card programming especially Nvdia CUDA stuff. After getting the SDK compiling under Fedora 12 (so far only possible with compat-gcc) first examples could be tested. It is quite impressive how fast and nice some tests look like. To get somehow familiar with the framework, I wrote a simple memcpy Continue reading →

The following recursive VHDL function provides the needed bit count for a given integer number. function len(x: integer) return integer is begin if (x<=1) then return 1;  else return 1+len(x/2); end if; end len;

This solution solves the issue on, how to detect either one or more bits are active in a bit array. The technique is quite easy, just isolate one of the bits. This can be done by the same technique as known from the arbiter implementation. Calculate the two’s complement of the bit array signal and Continue reading →

Here a very cute method to implement an FPGA round robin arbiter, inspired by [1]. Assumption Incoming signals “req”/”ack”, outgoing signal “grant”. Needed Behaviour req = “0001000″ => grant = “0001000″ -ACK- grant = “0001000″ req = “0011000″ => grant = “0010000″ -ACK- grant = “0001000″ -ACK- grant = “0010000″ … Technique To create a Continue reading →

Today I had a great day. I spend the whole day in Villingen and drove my motorbike on an indoor track (http://www.mo-ce.de/). It was the first time this year and the first time indoor. Also the handling of the motorbike was complete different, this could be related to the new suspension I invested during the Continue reading →

During the vacation time a lot of code changes were made. Now it is time to write a little bit about the changes. The first thing was to write a Cypress USB to wishbone interface which gave the possibility to connect wishbone compliant modules to USB. As testcase the wishbone lcd driver should help to Continue reading →