Ok, now the second part of this cypress story. The source which is provided by cypress contains some demo projects, for my test design which should put the board into a peripheral mode, the demo “de2″ is a good starting point. After some browsing through the code I saw that this demo puts SIE1 (Serial Interface Engine) into a simple loopback/FIFO mode where the usb driver could write some data with a bulk transfer into a buffer and read it back. This is a good starting point to implement a simple driver under Linux with libusb. But this needs some easy modification to the code, because the ml50x board has the peripheral port connected to the SIE2. After mapping SIE1 functionality to SIE2 and remove some unused code the driver implementation can be started. The driver just write some data into the cypress chip and reads it back.

Now the next step. This step includes includes the communication with the fpga. The fpga is connected with 16 data, 2 address and some control signals to the cypress chip. To transfer data to/from the fpga just use a simple protocol with a   and write/read enable signals. For this implementation the original SIE2 implementation of the demo program is our friend. Again remove some unused/not needed code from the implementation and add app_task implementation. This application task function will be called from the main loop. This function have to compare the control entries of the bulk transfer endpoints and execute the needed functionality like writing or reading to/from the fpga. The lsusb print out looks like:

Bus 004 Device 003: ID 04b4:4224 Cypress Semiconductor Corp.
Device Descriptor:
  bLength                18
  bDescriptorType         1
  bcdUSB               2.00
  bDeviceClass          255 Vendor Specific Class
  bDeviceSubClass         0
  bDeviceProtocol       255
  bMaxPacketSize0         8
  idVendor           0x04b4 Cypress Semiconductor Corp.
  idProduct          0x4224
  bcdDevice            0.04
  iManufacturer           1 codiert.org
  iProduct                2 FPGA - ML505 control
  iSerial                 3 42-24
  bNumConfigurations      1
  Configuration Descriptor:
    bLength                 9
    bDescriptorType         2
    wTotalLength           46
    bNumInterfaces          1
    bConfigurationValue     1
    iConfiguration          0
    bmAttributes         0xc0
      Self Powered
    MaxPower                0mA
    Interface Descriptor:
      bLength                 9
      bDescriptorType         4
      bInterfaceNumber        0
      bAlternateSetting       0
      bNumEndpoints           2
      bInterfaceClass       255 Vendor Specific Class
      bInterfaceSubClass      0
      bInterfaceProtocol    255
      iInterface              0
      Endpoint Descriptor:
        bLength                 7
        bDescriptorType         5
        bEndpointAddress     0x81  EP 1 IN
        bmAttributes            2
          Transfer Type            Bulk
          Synch Type               None
          Usage Type               Data
        wMaxPacketSize     0x0040  1x 64 bytes
        bInterval               0
      Endpoint Descriptor:
        bLength                 7
        bDescriptorType         5
        bEndpointAddress     0x02  EP 2 OUT
        bmAttributes            2
          Transfer Type            Bulk
          Synch Type               None
          Usage Type               Data
        wMaxPacketSize     0x0040  1x 64 bytes
        bInterval               0

After scanning the USB bus and opening the device it can be written/read by the following codes:

usb_bulk_write(hd, 2, &buf[0], 2, 10000);
usb_bulk_read(hd, 1, &rec[0], 2, 10000);

Code can be requested by mail — cheers

5 Responses to “Cypress CY7C6300 EZ-Host/EZ-Peripheral #2”
  1. Hello,

    I am doing the USB interface between Xilinx VIRTEX-5 borad and PC. Could you give me more detail how to implement the USB code with FPGA. BTW, may I have the code?

    Best Regards,

    Airs Lin

  2. Dragan Topalovic says:

    Hi,
    I am also trying something similar, to bring-up cypress CY7C67300 on a ML605 board. My star point was se2 demo, which also use SIE1 instead M605 SIE1, but I encoded some problems and it will be very useful for me to have your example.

    Best Regards, Dragan

    Dragan Topalovic Reply:

    Hi,
    I write new example based on your demo. It will loopback without any passing to FPGA. My host app do the simple usb_bulk_write and read, it stock on usb_bulk_read. Can I get your host app example and Microblaze firmware to conclude what I doing wrong?
    Best Regards, Dragan

  3. Hello,

    I am doing the USB interface between ml605 borad and PC. Could you give me more detail how to implement the USB code with FPGA. BTW, may I have the code?

    Best Regards,

    Ethan

  4. Hi,
    Thanks for your demo. Currently, A project I am very interested is that the Cypress Cy7c67300 USB controller is configured as a host and a USB keyboard is connected to the USB host port . All the key presses on the USB keyboard are displayed on the UART Hyper Terminal. I Wonder Can I get your host app example and Microblaze firmware as a reference. Thanks so much. I appreciate your help.

    Ethan